This video displays an actual output of FPGA based real time motion vectors computation routine implemented on Atlys Spartan6 FPGA Kit. <br />The FPGA output video also includes a picture in picture feature to illustrate the motion in scene being independent of the background image. <br />The motion vectors computation is implemented as a hardware co-processor designed via Vivado HLS and it completes the 640 motion vectors computation in less than 10 msec, including all memory transfers from main memory to processing core and back. <br />The video input and output interface to the FPGA kit is provided via a custom video interface board, which is connected to Atlys Spartan6 FPGA kit via its VHDCI peripheral connector. The video input and output format is NTSC 525/60Hz. <br />Further details of Atlys Spartan6 FPGA Board can be found here: <br />http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,836&Prod=ATLYS&CFID=5761645&CFTOKEN=f5ddc130dbb5920b-B82FFBBA-5056-0201-02BCA2CF4995E0ED
